Development Milestones#
For full documentation and milestones, see the Project Blog website.
Current Status#
| Task/Milestone | Completion |
|---|---|
| 1. Hardware Modifications | |
| a. CLIC Top-Level Integration to Vexriscv based SOC | 100% |
| b. CLIC Memory Map Implementation | 100% |
| c. CLIC Register Logic Implementation | 100% |
| d. CLIC Interrupt Logic Implementation | 100% |
| e. CLIC Vector Table Implementation | 100% |
| 2. Baremetal Software Modifications | |
| a. Startup code handling to initialize CLIC | 100% |
| b. CLIC interrupt configuration | 100% |
| c. CLIC interrupt handlers for Peripherals | 100% |
| d. CLIC driver development | 100% |
| e. CLIC Software Development Kit(SDK) update | 0% |
| 3. Linux Software Modifications | |
| a. Linux kernel configuration for CLIC | 0% |
| b. Linux kernel interrupt Controller Driver for CLIC | 0% |
| c. Linux Startup Code handling for CLIC | 0% |
| 4. Verification and Testing | |
| a. Verify RISC-V CLIC specification compliance with associated test. Targeting compliance of 75% initially. | 0% |
| b. Validate Litex system stability after CLIC integration | 0% |
| c. Litex Performance Analysis after CLIC integration | 0% |
| d. Documentation about CLIC integration and usage | 0% |